One way of improving the bandwidth to 10-20% is to use parasitic patches, either in another layer (stacked geometry) or in the same layer (coplanar geometry). However, the stacked geometry has the disadvantage of increasing the thickness of the antenna while the coplanar geometry has the disadvantage of increasing the lateral size of the antenna. It would therefore be of considerable interest if a single-layer single-patch wideband microstrip antenna could be developed. Such an antenna would better preserve the thin profile characteristics and would not introduce grating lobe problems when used in an array environment.
Tuesday, October 14, 2008
BW Enhancement Using Chip resistor loading
This method increases the bandwidth of the antenna by decreasing the quality factor. This method is used by itself or in conjunction with other methods in order to miniaturize the antenna also. Thus this method strives to achieve the two main goals for microstrip elements – bandwidth enhancement and miniaturization. Chip Resistor is basically a kind of low resistance short.
Three dimensional patches like V-shaped patch or wedge -shaped patch
Decreasing the quality factor of the microstrip antenna is also an effective way of increasing the antenna’s impedance bandwidth. In the former case, for feeding using a probe feed, a large reactance owing to the long probe pin in the thick substrate layer is usually a problem in achieving good impedance matching over a wide frequency range. To overcome this problem associated with probe-fed microstrip antennas, designs have been reported that bend the patch into a 3D V-shaped patch or the ground plane into an inverted V-shaped ground